Download driver Xilinx Platform Cable USB II Driver version 2.0.0.3 for Windows XP, Windows Vista, Windows 7 32-bit (x86), 64-bit (x64). Screenshot of files File Name. Vivado Design Suite 2019.1.3 is now available with support for. Production devices enabled: Virtex UltraScale+ 58G Devices (-1E, -1I, -2E, -2I): XCVU27P, XCVU29P. Download and install Xilinx Vivado. A driver is needed for Vivado to utilize this cable. We recommend to use the driver packages provided by Digilent.

Download and install Xilinx Vivado

The Xilinx Vivado design suite can be downloaded from http://www.xilinx.com/support/download.html free of chargefor registered users (registration is also free). For this release, we recommend Vivado 2018.x.The version used in some previous releases 2015.4 is known NOT to work on this release.Moreover the code needs modernisation to work with Vivado 2019.x, because Xilinx thinks ‘input’ is not equivalent to ‘input wire’. Generally this is not a problem with ASIC tools.

During the installation process, when asked for “Select Edition to Install”,please choose “Vivado Design Edition”. When choosing which packages toinstall, please add “Software Development Kit”. It is not required to installXilinx Vivado in system directories, so choose any installation directorypreferred. The installation requires up to 30 GB of disk space.

Xilinx

The default location is /opt/Xilinx and this will be the location referred to in the tutorial.Typically /opt will be on the relatively small root partition of the computer, so it is necessaryto make a symbolic link to a larger disk (which could be a server), for example:

For this version of Vivado the Xilinx recommended O/S 64-bit Ubuntu 16.04.3 LTS / 18.04 LTS.

Xilinx installation trees contain their own incompatible version of certain system libraries to “improve portability”. This will prevent more modern tools such as cmake from running properly. To avoid contaminating the LD_LIBRARY_PATH this flow explicitly sets the path to Vivado in fpga/Makefile. By default the Xilinx installer installs to /opt/Xilinx (which will typically be a symbolic link to a shared disk). If your administater mandated a different path, update the XILINX_ROOT and if necessary XILINX_VER in fpga/Makefile. Do not attempt to use a version of Vivado earlier than 2018.2. Use 2019.x at your own risk. If you must add the Xilinx tools to the path (for example to facilitate interactive use) make sure the version of cmake on the path is not too old when running buildroot.

If your machine cannot meet these requirements then synthesis should be able to run, albeit rather slowly, inside a virtual machine.The pre-build binary images were created with Ubuntu 18.04 LTS.

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License

A license is required to use the Xilinx Vivado suite. For users who bought anFPGA development kit, such as the Genesys2 kit, a voucher may be enclosed. Thisvoucher will allow the user to generate a site and device locked license(version limited as well). Such a license will allow a user to implementdesigns targeting the specific FPGA used in the development kit, such asKintex-7 FPGAs for the Genesys2 kit. This license is a version limited one. Usersare allowed to install and update the Xilinx Vivado suite for one year. Oncethe license is expired, the old Xilinx Vivado is still usable but notupdateable.

For users of low-end boards, such as the Nexys4-DDR, you can apply a freeWebPACK license which allows implementations targeting certain Artix-7,Kintex-7 and Zynq-7000 FPGAs[vivado-webpack].

To generate a license using a voucher or a WebPACK license, login to Xilinxand visithttp://www.xilinx.com/getlicense.

Academic users can obtain licenses for all devices for research purposes via Europractice (in Europe)or equivalent schemes.

Future Board options

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Nexys4-DDR is supported because it is low cost and widely available. Genesys2 is also supportedbecause it is the default platform for Ariane. Moreover its peripherals are largelycomplementary to the Nexys4-DDR, rather than being leading edge propietary parts.

It would be relatively easy to support the ArtyA7-100 which is cheaper and has a larger DDR3 ram thanthe Nexys4DDR. However it requires a separate PMOD if you want to use the SD-Card support.Signal integrity on the SD-Card interface is a limiting factor on performance, the PMOD interfacewould make this situation worse.

Environment settings

Here is an example script for setting up the Xilinx Vivado suite.

Note to export the XILINX_VIVADO variable which is required by FPGA simulation.

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USB-JTAG installation

The default JTAG and configuration method for both the Genesys2 and theNEXYS4-DDR kits is the UART-JTAG cable. A driver is needed for Vivado toutilize this cable. We recommend to use the driver packages provided byDigilent.
For 64-bit Ubuntu, please download and install the following two deb packages:

  • Adept 2.16.1 Runtime, X64 DEB
  • Adept 2.2.1 Utilities, X64 DEB

USB-UART installation

The FTDI USB-UART bridge chip used on NEXYS4-DDR is supported in Ubuntu 18.04 and does not require extra driver installation.

The USB-UART bridge is normally shown in Ubuntu as /dev/ttyUSB0 ~ /dev/ttyUSB3. Microcom, CuteCom or Screen can be used to connect to this console.

After installing microcom you will probably want to add your username to the dialout group:

This takes effect at next login. To use immediately you can use:

followed by (your old shell settings will be forgotten):

otherwise only the super user can make use of microcom.

You might want to add the Vivado tools to your path first to keep the environment clean. This prevents system toolsfrom trying to use shared libraries from the (older) Vivado install. Proceed as follows if you chose the default installlocation (or follow your system adminstrator instructions)

To use JTAG downloading with Vivado and the Digilent board you must install the drivers as follows (this one-off step might have to be performed by an administrator):

After this step the Digilent board should be unplugged and plugged in again.

The above procedure may change your LD_LIBRARY_PATH to an older version of libraries than some systems expect. If thishappens, you may get a message such as:

  • awk: symbol lookup error: awk: undefined symbol: mpfr_z_sub

A work-around is to manually execute unset LD_LIBRARY_PATH afterwards before installing the cross-compiler.

Continue the process below:

Info:

Model:

Xilinx Vivado Download

Xilinx Platform Cable USB II Driver
Vendor: Xilinx
Version: 2.0.0.3
Operating system:Impact Windows XP, Windows Vista, Windows 7
Bits: 32-bit (x86), 64-bit (x64)
Driver Date: 2007-10-26
Size:

Xilinx Impact 14.7 Windows 10

0.01 mb

Driver description

Download driver Xilinx Platform Cable USB II Driver version 2.0.0.3 for Windows XP, Windows Vista, Windows 7 32-bit (x86), 64-bit (x64).

Screenshot of files

File Name

Xilinx_USB_Cable.zip - (0.01 mb) v.2.0.0.3 - 26.10.2007

ds593.pdf - инструкция (2.2 mb)


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